| Description |
1 online resource (xv, 247 pages) : illustrations |
| Series |
Devices, circuits, and systems |
|
Devices, circuits, and systems.
|
| Bibliography |
Includes bibliographical references and index. |
| Contents |
Section 1. Timing-aware ATPG -- section 2. Faster-than-at-speed -- section 3. Alternative methods -- section 4. SDD metrics. |
| Summary |
Advances in design methods and process technologies have resulted in a continuous increase in the complexity of integrated circuits (ICs). However, the increased complexity and nanometer-size features of modern ICs make them susceptible to manufacturing defects, as well as performance and quality issues. Testing for Small-Delay Defects in Nanoscale CMOS Integrated Circuits covers common problems in areas such as process variations, power supply noise, crosstalk, resistive opens/bridges, and design-for-manufacturing (DfM)-related rule violations. The book also addresses testing for small-delay. |
| Language |
English. |
| Subject |
Metal oxide semiconductors, Complementary -- Testing.
|
|
MOS complémentaires -- Essais. |
|
Metal oxide semiconductors, Complementary -- Testing |
| Added Author |
Goel, Sandeep K., editor.
|
|
Chakrabarty, Krishnendu, editor.
|
| Other Form: |
Print version: Testing for small-delay defects in nanoscale CMOS integrated circuits. Boca Raton : CRC Press, 2014 9781439829417 (DLC) 2013028538 (OCoLC)441142171 |
| ISBN |
9781439829424 (electronic bk.) |
|
143982942X (electronic bk.) |
|
(hardcover ; alk. paper) |
|
(hardcover ; alk. paper) |
|
1315217813 |
|
9781315217819 |
|
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